Multi-core processing offers a means to break through the limitations of clock frequency scaling in order to deliver increased performance. Two or more cores in a processor allows for more performance while reducing power consumption per unit of work. This increased efficiency is achieved through the execution of multiple simultaneous tasks on separate cores for load balancing, security, virus protection, vector processing, etc. As a result, PCs, workstations, notebooks and servers can take advantage of efficient processing power to simultaneously run foreground applications and graphics processing while doing multi-stream HD media compression and decode, maintenance and anti-virus work in the background.
Realizing the benefits of multi-core operation requires increased memory bandwidth. Unless bandwidth is scaled commensurately with processor power, cores will be memory starved and performance will suffer. Furthermore, future memory bandwidth requirements are expected to increase dramatically. With three or more foreground applications running at 6.4 GB/s each, graphics processing at 25.6 GB/s, vector processing at 25.6 GB/s, plus media decode and encode, security and anti-virus, PC bandwidth requirements can exceed 100 GB/s.
he Rambus XDR™ memory architecture is well positioned to meet the bandwidth requirements of multi-core processors now and in the future. Current high-volume production XDR DRAM can already provide single-device bandwidths of 8 GB/s. Just two XDIMMs containing a total of 16 XDR devices could deliver total memory bandwidth of 128 GB/s. And the XDR architecture has a roadmap to device bandwidths of 32 GB/s and beyond with XDR2 DRAM. XDR memory offers the added benefit of increased signal integrity through differential signaling and easier board design with Rambus innovations such as FlexPhase™ circuit technology.
Multi-core technology is the next step in the evolution of computing. And with the XDR memory architecture, designers can unleash the power of multi-core processors.
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